Using process control monitor ( pcm ) to control process parameters , we fabricated the monolithic phase shift circuit chip
2.
The phase shifter circuit consists of five digital bits corresponding to differential phase shifts of 180 , 90 , 45 , 22 . 5 and 11 . 25 cascaded in a linear arrangement . the three lower phase shift circuits are of loaded - line type , in which the 11 . 25 phase shift bit use a single loaded - line configuration . the 90 and 180 phase shift bits are of reflection type , using lange coupler to realize the separation between the incident and reflection signals
3.
The proposed driving circuit includes a low - pass filter circuit �� feedback circuit �� signal generated circuit �� phase shifted circuit and power inverter circuit . a ti cooperation ' s dsp ( tms320lf2407a ) is chosen for the drive and control system based on the characteristics of usm , the interface circuit �� each function �� s flow chart and algorithm program are designed
4.
This paper goes on with analysis of the phased array radar calibration theory and compare of different schemes , then the best is adopted . 2 mhz digital circuit mainly composed of dds ( direct digital synthesis ) chip , which carries out the shift of the phase and the limit of the amplitude , has been designed and debugged successfully . it is used to substitute for the conventional phased shift circuit and amplitude limiting circuit which work at the radio frequency , so the all - digital transmit channel of phased shift array radar is achieved
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